riscemu.instructions.RV32I module¶
RiscEmu (c) 2021 Anton Lydike
SPDX-License-Identifier: MIT
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class
riscemu.instructions.RV32I.
RV32I
(cpu: riscemu.CPU.CPU)¶ Bases:
riscemu.instructions.InstructionSet.InstructionSet
The RV32I instruction set. Some instructions are missing, such as fence, fence.i, rdcycle, rdcycleh, rdtime, rdtimeh, rdinstret, rdinstreth All atomic read/writes are also not implemented yet
See https://maxvytech.com/images/RV32I-11-2018.pdf for a more detailed overview
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instruction_lb
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_lh
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_lw
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_lbu
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_lhu
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_sb
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_sh
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_sw
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_sll
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_slli
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_srl
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_srli
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_sra
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_srai
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_add
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_addi
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_sub
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_lui
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_auipc
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_xor
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_xori
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_or
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_ori
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_and
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_andi
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_slt
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_slti
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_sltu
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_sltiu
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_beq
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_bne
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_blt
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_bge
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_bltu
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_bgeu
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_j
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_jal
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_jalr
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_ret
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_ecall
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_ebreak
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_scall
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_sbreak
(ins: riscemu.Executable.LoadedInstruction)¶
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instruction_nop
(ins: riscemu.Executable.LoadedInstruction)¶
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